Cypress : Introducing the 1Mb Quad SPI nvSRAM

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Cypress introduces its newest nonvolatile SRAM (NVSRAM) solution with a Quad Serial Peripheral Interface (SPI). This solution enables system designers to instantly capture and store critical data on power loss without a battery. It also meets the data throughput performance of high speed parallel nonvolatile RAM (NVRAM), yet offers the reduced pin count of the Quad SPI interface.

High Performance nvSRAM Solution
• Provides 54MBps burst read/write throughput with unlimited write endurance, exceeding the throughput of a x16, 40ns parallel interface
• Offers an integrated, high accuracy, real-time clock option

Battery Free Solution
• Performs the STORE operations during powerdown with AutoSTORE. AutoSTORE uses zero system time with a small external capacitor to complete the STORE during power loss. When power returns to operating minimum, data is automatically RECALLed from the nonvolatile elements into the SRAM
• Stores data reliably on power loss without batteries, even in magnetic fields, and is RoHS compliant
• Eliminates the need for an external power management controller

Low Pin Count
• Offers a Quad SPI interface with a 108MHz clock rate
• Requires only 6 controller pins connected to the MCU, compared to 29-pins required by a typical parallel SRAM solution
• Allows for a simpler design with reduced pin count

Cypress’ Reliable nvSRAM Technology
• Allows full array STOREs from SRAM to nonvolatile in just 8ms following each power loss or brownout
• Supports one million STORE cycles into the nonvolatile cells. If power is disrupted five times each day, this would allow over 540 years of nonvolatile STOREs
• Provides 20 year data retention

APPLICATIONS

  • RAID storage
  • Industrial automation
  • Data logging
  • Computing
  • Networking

 
 
 
 
 
 
 
 

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