Cypress – FM4 S6E2D-Series Graphical Display ARM® Cortex®-M4 Microcontroller (MCU) Family

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As part of Cypress’s FM4 family of ARM Cortex-M4 based microcontrollers, this new series incorporates a dedicated hardware graphics engine that supports rich display images in a cost-effective, single-chip solution.

The Cypress FM4 S6E2D-Series is ideal for embedded applications with TFT LCD featured HMIs like home appliances, multi-function printers, industrial equipment, electronic musical instruments, security systems, and more.

The graphics engine and 512KB of video RAM allow complex image overlap, mirroring, scaling, and image movement with minimal CPU overhead. Before the Cypress S6E2D, this type of sophisticated graphics solution was only possible with multi-chip implementations costing significantly more.

S6E2D-Series Features

High Performance MCU Subsystem

  • 540 CoreMark®, 160-MHz ARM® Cortex®-M4 CPU
  • 269μA/MHz active current with 2.7V to 3.6V operating voltage
  • Ultra low power 1.0μA real-time clock (RTC) operating current
  • Up to 384KB flash and 36KB SRAM with a 16KB flash accelerator
  • Error-Correcting Code (ECC) support, hardware WatchDog Timer (WDT), low-voltage detect, and clock supervisor blocks for safety-critical applications

Digital Subsystem

  • 1x Multi-Function Timer (MFT)
  • 3x Programmable Pulse Generators (PPG)
  • 8x Base Timers, 1x Quadrature Position/Revolution Counters (QPRC)
  • 1x Dual Timer, 2x CRC (fixed and programmable), and 1x Watch Counter
  • 8x channels of Multi-Function Serial (MFS) interfaces configurable as SPI, UART, I2C, or LIN
  • 1x USB, CAN-FD, 1x SD Card, External Bus Interface, and 2x I2S

Graphics Subsystem

  • Graphics Display Controller (GDC) and 512KB VRAM
  • High-Speed Quad-SPI (HS-QSPI), Hyper Bus, and External VRAM Interfaces
  • Hardware layer support, alpha blending, image manipulation (zoom, scale, move, rotate, mirror)
  • Direct and indirect color formats for custom color palettes to save memory
  • ‘On-the-fly’ blending from different data sources to reduce VRAM usage
  • ‘On-the-fly’ decompression to minimize Flash size for image storage

Analog Subsystem

  • 2x 12-bit, 1Msps ADC with a 24-channel multiplexer input

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